FPGA Data Acquisition and Control

The primary objective of this project is to explore using low end, off the shelf FPGA boards to implement modular and extendable data acquisitions and control for laser interferometer systems.

=Problem Definition= As lasers have gotten smaller and cheaper, they are ending up in scientific laboratories and fields that are not specialized in laser optics. In order for sensitive, scientific instruments to give valid results, the lasers need to be controlled to remove the impact of thermal, electrical, and mechanical noise. Our goal is to produce an inexpensive, modular, and expandable solution for data acquisition from a laser and to control this laser system. This will lower the cost of entry for less specialized labs and independent researchers, helping promote the use of optical instruments in a wide range of scientific fields.

Background
This project will have multiple background portions. Firstly, we will be using a Red Pitaya Board that uses a Zynq chip. This will be the main location for the data acquisition and control loop. Then one needs to understand what a laser interferometer does and how we will be using it. Another important aspect of this project is the Pound-Drever-Hall control loop that will be used to control the entire system, from laser to data acquisition.

Deliverables
The deliverables for this project are as follows:

1. Be able to demonstrate two Red Pitaya boards communicating back and forth.

2. Be able to demonstrate the acquisition of data and the storing this data

3. Be able to gather input data from a laser

4. Be able to demonstrate the usage of a Pound-Drever-Hall control loop

5. Be able to use the Pound-Drever-Hall loop to control the laser

Specifications
Basic Considerations:

1. Modular design that will allow multiple implementations across multiple platforms.

2. 2 Analog-To-Digital Converter Inputs and 1 Analog-To-Digital Converter Output

3. High Speed Data Sampling -- Fastest Attainable

=Design Considerations= Some things we will need to consider is how we will get multiple boards to communicate, how we will gather data and store that information, and how we will be able to create a control loop. Firstly, we will be looking into how to synchronize two boards. We can use logic functions inside the boards itself, or move some resistors on the boards so that we can use an outside clock source that all data acquisition can use this clock. To store the data acquired, we can use multiple different output sources. We can store it on the FPGA itself, output a binary file, output to a spreadsheet, or output to some python script (or other language) so we can create a visual representation of the data. When creating a control loop, we will need to go through the process of making multiple block diagrams using the specific part specs given. We will need to keep in mind what each part can handle and what it's limits are. Some other things we will need to keep into consideration the input voltage and current. We need to make sure that they aren't too high due to the potential of 'burning up' the FPGA or too low causing incomplete or inaccurate readings. To do this, we will potentially be using a separate heating mechanisms for additional control and temperature measurements. With this, we will need some sort of interface to control the thermal unit.

=Project Learning= All the project learning that has been done so far has been through reading papers and other source. These papers are stored in the following google drive folder:

https://drive.google.com/drive/folders/16vyaEGdfl7epmlNNZf9rPNHG0yYrHRFh

=Final Design=

=Validation=

=Team Members=

=Additional Documentation=

This section involves any additional URL's and files that we used to design, implement, and test our projects. This includes our Project Schedule, which takes breaks into account, our Meeting Agenda and Minutes for every week, presentations done, and more.

Project Schedule:



Meeting Agenda and Minutes:

https://drive.google.com/drive/folders/1N3VZ4ltA2Oxs-BCvWhRuyVUYpKuJwwT_

Presentations:

Preliminary Design Review: https://docs.google.com/presentation/d/1qNgygZmloFiA3YAT-jaoAQharKtmmwr0DuBmAPOwm5c/edit

Snapshot 2 Presentation: COMING SOON