General Power Converter Startup

Design and build an innovative way of starting the NAVY's 250kW general converter. The final project design must provide the control and switching power for quad half-bridge inverter using both GaN and SiC MOSFET switching devices sourced from a standard US power socket.

Background
Convert one form of electric power to another efficiently and compactly for use in controlling the larger power converter project. The project will incorporate two converter designs:

Specifications
Power Converter Specifications:

* 3.3V Isolated (gate driver) * 6V, 100mA x 8 * 3.3V Isolated (gate driver) * 20V, 100mA x 8
 * Input: 120 Vac @60Hz
 * Microcontroller: 3.3 Isolated, 500mA
 * GaN System:
 * SiC System:
 * Size: ~200mm^3 (~8 in ^3)
 * Efficiency: over 90%

Power Converter Schematic
The schematic shown above describes our full test board, designed to stress our power supply’s ability to provide for a system that is close to our target system. This design is simply four parallel half bridge switching inverters with Si8274 switch drivers providing an interface with off-board controller and the half bridges. Each switch driver is accompanied by supporting capacitors and resistors with control input from a PWM signal from the controller and power from the off-board power supply. In the schematic each bridge has four switches, with two of the switches being redundant to test multiple types of devices. For now we are building one forth of this design for prototyping and testing.

Prototype(s)
This board was somewhat rushed as we did not yet have the proper tools to construct a surface mount board, even though our parts were of the surface mount variety. This was a result of some errors in oversight with our first board and ultimately didn’t work as static electricity destroyed the internals of the silicon driver chip.

Soon after the failure of the first prototype we had gained the ability to construct our own printed circuit board and prototype 2 is currently in construction. This should quicken our ability to test new ideas and future prototypes on the fly.

Steady State GaN MOSFET Thermal Testing
Observed and recorded device case temperature and Drain-Source current at constant Drain-Source and Gate-Source potential while the GaN MOSFET is operating at steady state(non-switching) while applying heat (increasing ambient temperature) to the system with a heat gun. (Vgs = 2.3 V, Vds = 6V)



Conclusion
Although GaN MOSFETs are rated for a temperature of 150 Celsius on their casing special care needs to be taken to prevent thermal runaway at much lower temperatures, around 80 degrees Celsius. If device starts thermal runaway and goes without check it will fail. This may be managed via heat sinking and control and monitoring. We will further test the thermal characteristics of these GaN devices during switching operations.

KiCad Designs (System Architecture)
Due to time constraints, project re-scoping 3 times, and semester coming to an end there was not enough time to fulfill the new needs of Amrit’s design. For this reason, we were given the option to create two circuits using KiCad. This was done for the purpose of having the experience of being able to design, build, and test a prototype as to what course entails.

Isolated DC-DC Converter Schematic


The schematic above is a DC-DC converter created using KiCad. The design consists of an Isolated DC-DC converter chip (R1S-1224/HP) to isolate the input and output side. The chip has a 2:1 ratio meaning it will convert the lower input voltage to a higher output voltage. In this design 10 Volts will go through pins 1 and 2 of the chip and output 20 Volts through pins 4 and 5 of the chip. On the left side of this design the capacitors are used as decouplers to filter out the high frequency noise to prevent damage to the chip. The inductor is used to tune the DC-DC converter chip to get the desired output voltage. On the right side of design, the capacitors are used as decouplers to filter out high frequencies. The resistor is used to limit the amount of current and the Zener diode is used for voltage protection/regulation on the output side. The output voltage will be used by the driver side of the Gate Driver design.

Isolated Gate Driver Schematic
[[File:gdriver_schematic.jpg |400px|center

The schematic above is for one of four of the half bridge quad inverters. The goal of this design is to simply have the power MOSFET switch on or off. The gate driver consist an IC chip (Si8271) that has an isolated input and ground on both sides. In the driver side of the chip an input voltage is attached from the output of the DC-DC converter. Another source is applied to the input side of the chip to turn the chip on. All PWM drivers include programmable dead time, which adds a user-programmable delay between transition of Vo+ and Vo-. The amount of dead time delay (DT) is programmed by a single resistor connected to the input. Vo+ and Vo- are the pathways for the current to flow and act as a sink or source depending on if the transistor is on or off. Lastly the parallel connected capacitors are used as decouplers to filter out higher frequencies.

Project Learning
In the process of designing and building this circuit in the few weeks between snapshot and Expo we learned:


 * Circuit Board CAD


 * Board Spacing


 * Trace Size and Power Capability


 * Signal Isolation


 * High Frequency PCB Design Considerations


 * PCB Board Milling Process

If all these criteria are met then the board is ready to be etched or cut with the Milling machine. These are important points to consider when manufacturing a PCB. Also, making sure there are no errors in the design rule check. With the project re-scope we were able to gain experience in being able to design, build, etch board with milling machine, and test the final prototype.

Engineering Specifications

 * SiC MOSFETS and GaN MOSFETS
 * Microcontroller
 * Gate Driver
 * DC/DC Converter
 * AC/DC Power Supply
 * Quad Half-Bridge Inverter

Agendas
Agendas

Minutes
Minutes

Project Schedule
Schedule

Design Report
Design Report

Final Presentation
Presentation