FPGA Data Acquisition and Control

The primary objective of this project is to explore the implementation of modular and extendable data acquisitions and control for laser interferometer systems by using low end, off the shelf FPGA boards.

=Problem Definition= Lasers are being used more frequently in scientific instruments. But for experiment results to be valid, the lasers have to be carefully controlled using expensive dedicated hardware. We are producing a cheap, modular, and extendable data acquisition and control backbone for laser instruments. This will allow labs and researchers to produce high quality optical research less expensively.

Background
For this project, we will be using a STEMLab 125-14 Red Pitaya FPGA that uses a Zynq 7010 System on a Chip (SoC). This will be the main location for the data acquisition and control loop. We also need to understand what a laser interferometer does and how we will be using it. Another important aspect of this project is the Pound-Drever-Hall control loop that will be used to control the entire system, from the laser to the data acquisition.

Deliverables
The deliverables for this project are as follows:

1. Be able to demonstrate two Red Pitaya boards communicating back and forth.

2. Be able to demonstrate the acquisition of data and the storing this data

3. Be able to gather input data from a laser

4. Be able to demonstrate the usage of a Proportional-Integral-Derivative Calculation to calculate a correction signal.

5. Be able to use the Pound-Drever-Hall loop to control the laser

Specifications
=Design Considerations= 1. Some things we will need to consider is how we will get multiple boards to communicate on a synchronized clock signal. Options involve using the clock cycle of a master board and have all the other boards synchronize to it. Or we can use SATA connectors and move resistors on the boards to use an external clock source.

2. How we will gather data and store that information. We can gather data through the analog inputs and store the data on the disk of one of the boards, or output the data to a script or file. In other words, would we rather store the data on the hardware or on the software.

3. How we will be able to create a control loop. The Red Pitaya boards allow for the use of software, hardware and a mix of the two. Some of the control loop may need to utilize a hardware description language software (like Vivado) to create a control loop and then the software to the desired specification; however, we could only need one or the other.

4. Some other things we will need to keep into consideration the input voltage and current. We need to make sure that they aren't too high due to the potential of 'burning up' the FPGA or too low causing incomplete or inaccurate readings. To do this, we will potentially be using a separate heating mechanisms for additional control and temperature measurements. With this, we will need some sort of interface to control the thermal unit.

=Project Learning=

The learning for this project was done around a period of about 8 weeks. In these weeks, we spent hours looking through a variety of academic journals and scientific articles. Much of our learning was spent investigating on whether or not other teams have been successful in data acquisition using FPGAs and what sort of benefits comes with using FPGAs versus other boards. The one suggested by our client to use was a board known as the Red Pitaya. The Red Pitaya has been used in data acquisition platforms before twice by two separate teams. Those teams were able to get their board working successfully and so with the glaring evidence that this is a viable solution as well as the extensive product comparison sheet, we decided to run with it.

We needed to completely understand the laser we were using and what type of voltage it needs to operate and why this laser was the best laser for our cause. We needed to know its operating range as well as frequency/wavelength range.

Some of the project learning that we completed included understanding the functionality of the Pound-Drever-Hall Loop. We needed this type of control loop due to the laser that we will be analyzing based off of the voltages given off from the photo detector the laser beam hits.

Another section of our project learning was understanding the basics of a Proportional-Integral-Derivative Calculation. This calculation will result in our correction signal and understanding what each variable does and where the value came from was pertinent to implement this system.

More research also went into how will we output data from hardware to software or using either one to store the data. Understanding the Red Pitaya Interface, the Zynq 7010 SoC, and AXI Interfaces was a very important aspect to designing a functioning system.

Finally, the last big section for project learning was finding different plans of attack for synchronizing the clocks multiple Red Pitaya boards as well as getting a time stamping capability for the data coming into the Red Pitayas.

Most of the project learning that has been done so far has been through reading papers and other sources. The Zynq Chip documentation and all Red Pitaya documentation from their sites were also major contributors to our knowledge. Most of these papers are stored in the following google drive folder:

https://drive.google.com/drive/folders/16vyaEGdfl7epmlNNZf9rPNHG0yYrHRFh

=Final Design=

=Validation= This section hold our teams overall plan to validate all portions of our design followed by the testing procedures for how we validated each step of our design process.

Test Procedures
Here are all of the test procedures we used to test the portions of the designs and validate them. They are all built from the same template attached here:

=Future Work= 1. Interfacing with the CPU to output the Figure of Merit calculation.

2. Interface with the CPU to store the data from the Red Pitaya.

3. Interfacing with the CPU to update the K values specified in the PID Calculation ro update real time.

4. Synchronize the clocks of multiple Red Pitaya boards.

5. Implement a time stamping system for the inputs to the system.

Note: Completing some of these steps may require editing the hardware and software that has already been created and validated.

=Team Members=

=Additional Documentation=

This section involves any additional URL's and files that we used to design, implement, and test our projects. This includes our Project Schedule, which takes breaks into account, our Meeting Agenda and Minutes for every week, presentations done, and more.

Project Schedule:



Meeting Agenda and Minutes:

https://drive.google.com/drive/folders/1N3VZ4ltA2Oxs-BCvWhRuyVUYpKuJwwT_

Presentations:

Snapshot 1 Presentation Work: https://drive.google.com/drive/folders/1CA4fnBwNcAqyHgFfP0Lv-MfjJVVTj_we

Preliminary Design Review: https://docs.google.com/presentation/d/1qNgygZmloFiA3YAT-jaoAQharKtmmwr0DuBmAPOwm5c/edit

Snapshot 2 Presentation: https://docs.google.com/presentation/d/1L0RskYqV3tdFSKYgVyYwhOr91OsjQqlO01ixB0C7K3Y/edit#slide=id.p

Engineering Release Review: https://docs.google.com/presentation/d/1FV5w1orSSzBVz5cCtY6RCiZNeHVd-sPDkOruZLNsGpY/edit

Snapshot 3 Presentation: https://docs.google.com/presentation/d/1QrvxnlcMGhEID9B09nCLMu37_b1lUZuZVRvd087yV3I/edit

E-Poster: https://docs.google.com/presentation/d/1kWFXeWmUUNIwnJWYIZGH6nGNgpzJn3RJvcZ0mwgszr0/edit#slide=id.g753cf5d684_6_1

Engineering EXPO Presentation: https://docs.google.com/presentation/d/1uLXQCIHGdgpvS2uEov06irN0FjxV3PnH-narqe_2m78/edit#slide=id.g845d0eb990_1_44

=Special Thanks=

We would like to give a special thank you to our sponsor Thorlabs Inc. and the team we were working with: Dr. Chris Manning, Andrew Helberts, and Mathew Philippou.

We would also like to give a special thank you to our faculty advisors Dr. Feng Li, and Dr. James Frenzel for helping us through each portion of our project.

And finally, a special thank you to all industry experts who took the time to give us insight on their knowledge and experiences.